performance – ideal dither

Reading: Dynamic Register Renaming Through Virtual-Physical Registers

By Doug Reed December 23, 2020microarchitecture, now reading, performanceNo Comments

Dynamic Register Renaming Through Virtual-Physical Registers Journal of Instruction Level Parallelism, 2000 In Summary The authors propose a simple change to PRF allocation that aims to reduce register pressure from…

Reading: eXtended Block Cache

By Doug Reed December 20, 2020caches, now reading, performanceNo Comments

eXtended Block Cache HPCA 2000In SummaryThe authors propose propose the eXtended Block Cache (XBC), a new structure to replace the Trace Cache (TC). XBC has similar latency and bandwidth to TC,…

Reading: High Performance Cache Replacement Using RRIP

By Doug Reed December 19, 2020caches, now reading, performance, replacementNo Comments

High Performance Cache Replacement Using Re-Reference Interval Prediction (RRIP) ISCA 2010 In Summary The authors propose (broadly) two new replacement policies, primarily useful in shared LLCs: Static RRIP: with this…